70 lines
1.8 KiB
C
70 lines
1.8 KiB
C
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void enable_bdomain_protection(void) {
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register_clear_bits(&(PWR->CR), PWR_CR_DBP);
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}
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void disable_bdomain_protection(void) {
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register_set_bits(&(PWR->CR), PWR_CR_DBP);
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}
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void rtc_init(void){
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uint32_t bdcr_opts = RCC_BDCR_RTCEN;
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uint32_t bdcr_mask = (RCC_BDCR_RTCEN | RCC_BDCR_RTCSEL);
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if (current_board->has_rtc_battery) {
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bdcr_opts |= (RCC_BDCR_RTCSEL_0 | RCC_BDCR_LSEON);
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bdcr_mask |= (RCC_BDCR_LSEMOD | RCC_BDCR_LSEBYP | RCC_BDCR_LSEON);
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} else {
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bdcr_opts |= RCC_BDCR_RTCSEL_1;
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RCC->CSR |= RCC_CSR_LSION;
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while((RCC->CSR & RCC_CSR_LSIRDY) == 0){}
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}
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// Initialize RTC module and clock if not done already.
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if((RCC->BDCR & bdcr_mask) != bdcr_opts){
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print("Initializing RTC\n");
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// Reset backup domain
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register_set_bits(&(RCC->BDCR), RCC_BDCR_BDRST);
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// Disable write protection
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disable_bdomain_protection();
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// Clear backup domain reset
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register_clear_bits(&(RCC->BDCR), RCC_BDCR_BDRST);
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// Set RTC options
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register_set(&(RCC->BDCR), bdcr_opts, bdcr_mask);
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// Enable write protection
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enable_bdomain_protection();
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}
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}
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void rtc_wakeup_init(void) {
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EXTI->IMR |= EXTI_IMR_MR22;
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EXTI->RTSR |= EXTI_RTSR_TR22; // rising edge
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EXTI->FTSR &= ~EXTI_FTSR_TR22; // falling edge
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NVIC_DisableIRQ(RTC_WKUP_IRQn);
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// Disable write protection
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disable_bdomain_protection();
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RTC->WPR = 0xCA;
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RTC->WPR = 0x53;
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RTC->CR &= ~RTC_CR_WUTE;
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while((RTC->ISR & RTC_ISR_WUTWF) == 0){}
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RTC->CR &= ~RTC_CR_WUTIE;
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RTC->ISR &= ~RTC_ISR_WUTF;
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//PWR->CR |= PWR_CR_CWUF;
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RTC->WUTR = DEEPSLEEP_WAKEUP_DELAY;
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// Wakeup timer interrupt enable, wakeup timer enable, select 1Hz rate
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RTC->CR |= RTC_CR_WUTE | RTC_CR_WUTIE | RTC_CR_WUCKSEL_2;
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// Re-enable write protection
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RTC->WPR = 0x00;
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enable_bdomain_protection();
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NVIC_EnableIRQ(RTC_WKUP_IRQn);
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}
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